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J-GLOBAL ID:200902230457364900   Reference number:03A0788311

円形状微細穴形成に対する犠牲層としての電着レジストの適用

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Material:
Volume: 123  Issue: 11  Page: 477-482  Publication year: Nov. 01, 2003 
JST Material Number: L3098A  ISSN: 1341-8939  Document type: Article
Article type: 原著論文  Country of issue: Japan (JPN)  Language: JAPANESE (JA)
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I/O units  ,  Manufacturing technology of solid-state devices 
Reference (8):
  • (1) TOOL ENGINEER : Vol. 43, No. 8, pp. 9-78 (1999-8) (in Japanese)
  • 機械と工具:43,8,pp. 9-78 (1999-8)
  • (2) M. Yasui, et al. : “Micro Electro-forming Process using a silicon-mold”, Tech. Digest of 18th Sensor Symposium, 2001, pp. 65-68, Kawasaki (2001)
  • (3) M. Yasui, K. Kakushima, Y. Hirabayashi, M. Mita, and H. Fujita : “Micro-hole fabrication using a Silicon-mold”, T. IEE Japan, Vol. 122-E, No. 8, pp. 4145-416 (2002-8) (in Japanese)
  • 安井 学·角嶋邦之·平林康男·三田 信·藤田博之:「Si鋳型を用いた微細穴の試作」,電学論E,122,8,pp. 4145-416 (2002-8)
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