Calculation method of breakdown voltage BV<sub>CEO</sub> for double diffused transistor structure.

SUGAWARA FUMIHIKO; ABE TAKUJI; YONEYA MASAHARU; ONUMA KOICHI

Art

J-GLOBAL ID：200902244974949499 Reference number：03A0233239

Calculation method of breakdown voltage BV_CEO for double diffused transistor structure.

2重拡散トランジスタ構造の降伏電圧BV_CEOの算出法

Publisher site {{ this.onShowPLink() }} Copy service {{ this.onShowCLink("http://jdream3.com/copy/?sid=JGLOBAL&noSystem=1&documentNoArray=03A0233239&COPY=1") }}
Access JDreamⅢ for advanced search and analysis. {{ this.onShowJLink("http://jdream3.com/lp/jglobal/index.html?docNo=03A0233239&from=J-GLOBAL&jstjournalNo=S0937A") }}

Author (4)： , , ,
Material：
Volume： 37 Issue： 2 Page： 21-25 Publication year： Feb. 2003
JST Material Number： S0937A ISSN： 0286-5904 Document type： Article
Article type：原著論文 Country of issue： Japan (JPN) Language： JAPANESE (JA)

,...
,...

To see more with JDream III (charged). {{ this.onShowAbsJLink("http://jdream3.com/lp/jglobal/index.html?docNo=03A0233239&from=J-GLOBAL&jstjournalNo=S0937A") }}

Measurement,testing and reliability of solid-state devices

, , ,

Return to Previous Page

Calculation method of breakdown voltage BVCEO for double diffused transistor structure.

Calculation method of breakdown voltage BV_CEO for double diffused transistor structure.