Art
J-GLOBAL ID：200902257753333544   Reference number：03A0558437

Guaranteed Passive Balancing Transformations for Model Order Reduction

モデル次元低減のための保証受動性バランス変換
Author (3)：
PHILLIPS J R

About PHILLIPS J R

(Cadence Design Systems, CA, USA)

About Cadence Design Systems, CA, USA

, 
DANIEL L

About DANIEL L

(Massachusetts Inst. Technol., MA, USA)

About Massachusetts Inst. Technol., MA, USA

, 
SILVEIRA L M

About SILVEIRA L M

(Technical Univ. Lisbon, Lisboa, PRT)

About Technical Univ. Lisbon, Lisboa, PRT


Material：
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (IEEE Trans Comput-Aided Des Integr Circuits Syst)

About IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems


Volume： 22  Issue： 8  Page： 1027-1041  Publication year： Aug. 2003 
JST Material Number： B0142C  ISSN： 0278-0070  CODEN： ITCSDI  Document type： Article
Article type： 原著論文  Country of issue： United States (USA)  Language： ENGLISH (EN)
Thesaurus term：
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
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dimensional reduction

About dimensional reduction

,...
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JST classification (2)：
JST classification
Category name(code) classified by JST.
Theory of computation 
(JB02000A)

About Theory of computation

,  Circuit theory in general 
(NA02010M)

About Circuit theory in general

Terms in the title (5)：
Terms in the title
Keywords automatically extracted from the title.
モデル

About モデル

, 
次元低減

About 次元低減

, 
保証

About 保証

, 
受動性

About 受動性

, 
バランス

About バランス


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