Art
J-GLOBAL ID：200902261571850443   Reference number：03A0348565

Embedded-Memory Test and Repair: Infrastructure IP for SoC Yield

埋込みメモリ試験と修理: SoC歩留りのためのインフラストラクチャーIP
Author (2)：
ZORIAN Y

About ZORIAN Y

(Virage Logic)

About Virage Logic

, 
SHOUKOURIAN S

About SHOUKOURIAN S

(Virage Logic)

About Virage Logic


Material：
IEEE Design & Test of Computers  (IEEE Des Test Comput)

About IEEE Design & Test of Computers


Volume： 20  Issue： 3  Page： 58-66  Publication year： May. 2003 
JST Material Number： B0007C  ISSN： 0740-7475  Document type： Article
Article type： 原著論文  Country of issue： United States (USA)  Language： ENGLISH (EN)
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interposition

About interposition

,...
Semi thesaurus term：
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
SOC(IC)

About SOC(IC)

,...
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JST classification (1)：
JST classification
Category name(code) classified by JST.
Memory units 
(JC04060F)

About Memory units

Terms in the title (7)：
Terms in the title
Keywords automatically extracted from the title.
埋込みメモリ

About 埋込みメモリ

, 
試験

About 試験

, 
修理

About 修理

, 
SOC

About SOC

, 
歩留り

About 歩留り

, 
インフラストラクチャー

About インフラストラクチャー

, 
IP

About IP


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