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J-GLOBAL ID:200902274350526182   Reference number:04A0348869

A Hardware Design Technique for Next Generation

超高集積LSI時代に向けたハードウェア設計法
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Volume: 124  Issue:Page: 995-1003  Publication year: Apr. 01, 2004 
JST Material Number: S0810A  ISSN: 0385-4221  Document type: Article
Article type: 原著論文  Country of issue: Japan (JPN)  Language: JAPANESE (JA)
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Reference (21):
  • (1) Y. Hokari : “Review of the ITRS2001 Technology Roadmap”, IPSJ SIG Technical Report on SLDM, Vol. 2002, No. 46, pp. 55-60 (2002-5) (in Japanese)
  • 穂苅泰明:「半導体技術ロードマップの最新動向」,情処研報,2002, 46, pp. 55-60 (2002-5)
  • (2) M. Bimbaum and H. Sacks : “How VSIA Answers the SOC Dilemma”, IEEE COMPUTER, pp. 42-50 (1999-6)
  • (3) 木下常雄:システム-レベル設計とは何か,Design Wave Magazine, pp. 28-33 (2000-7)
  • (4) H. Mukai : “Integrated Circuits Technology Trend, Stepping into System LSI Era”, Oki Technical Review, OTR180, Vol. 66, No. 1, Oki Electric Industry Co., Ltd.
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