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J-GLOBAL ID：200902288528834510   Reference number：08A0132632

Reduction of Bootstrapped Switch Area Consumption Using Pre-Charge Phase

プリチャージ位相を使用したブートストラップスイッチ面積消費の低減

Author (3)： NICODIMUS Retdian A. (Tokyo Inst. of Technol., Tokyo, JPN) ,  TAKAGI Shigetaka (Tokyo Inst. of Technol., Tokyo, JPN) ,  FUJII Nobuo (Tokyo Inst. of Technol., Tokyo, JPN)
Material： IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences (Institute of Electronics, Information and Communication Engineers)  (IEICE Trans Fundam Electron Commun Comput Sci (Inst Electron Inf Commun Eng))
Volume： E91-A  Issue： 2  Page： 476-482  Publication year： Feb. 01, 2008 
JST Material Number： F0699C  ISSN： 0916-8508  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： circuit analysis ,...
Semi thesaurus term： bootstrapped switch ,...

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JST classification (1)： Electronic circuits in general  (NC05010N)

Reference (8)：

• RAZAVI, B. Design of Analog CMOS Integrated Circuits. 2001
• FAYOMI, C. J. B. Low-voltage CMOS analog switch for high precision sample-and-hold circuit. Proc. 43rd IEEE Midwest Symp. on Circuit and Systems, Aug. 2000. 2000, 710-713
• LEE, T. A 1.5-V 50-MHz pseudodifferential CMOS sample-and-hold circuit with low hold pedestal. IEEE Trans. Circuits Syst. I. 2005, 52, 9, 1752-1757
• FAYOMI, C. J. B. Low-voltage CMOS analog bootstrapped switch for sample-and-hold circuit : Design and chip characterization. Proc. IEEE Int. Symp. on Circuits and Systems, May 2005. 2005, 3, 2200-2203
• AKSIN, D. A bootstrapped switch for precise sampling of inputs with signal range beyond supply voltage. Proc. IEEE Custom Integrated Circuits Conf., Sept. 2005. 2005, 743-746

Terms in the title (5)： プリチャージ ,  位相 ,  ブートストラップ ,  面積 ,  消費