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J-GLOBAL ID:200902294161838573   Reference number:03A0558268

「ギカ」の壁を破るためのシステム設計基礎理解~分布定数回路,線路損失,差動伝送,10Gbpsトランシーバー~ 第2章 高速システム設計における線路損失の考えかた-数百Mbpsを超えたら抵抗損と誘電損に要注意

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Volume:Issue:Page: 48-55  Publication year: Sep. 01, 2003 
JST Material Number: L3906A  Document type: Article
Article type: 解説  Country of issue: Japan (JPN)  Language: JAPANESE (JA)
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Electronic circuits in general 

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