Kagotani Hiroto

Affiliation and department：
Homepage URL (1)： http://kaken.nii.ac.jp/ja/r/50271060

Research field (1)： Computer systems

Research keywords (20)：最適化 , パイプライン動作 , 非同期式回路テスト , 2相動作 , 演算器割当て , マッチング問題 , 2相非同期式回路 , VLSIシステム設計 , ランダム割当て , 局所性緩和 , 非同期式VLSIシステム , パイプライン , 非同期式論理合成 , スケジューリング , パイプライン機構 , グラフ変形 , 依存性グラフ , 自動合成 , 非同期式プロセッサ , 非同期式回路

Research theme for competitive and other funds (6)：

2016 - 2019 Realization of secure and reliable communication in a remote control type / autonomous mobile system in the IoT era
2012 - 2016 Design method of optimized asynchronous pipelines using control-flow graphs
1999 - 2000 非同期式プロセッサ設計における演算器資源割当ての最適化法
1997 - 1998 パイプライン化された依存性グラフからの高速非同期式プロセッサの生成
1996 - 1996 非同期式パイプライン型プロセッサの自動合成に関する研究

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Papers (72)：

A Consideration of Side-Channel Attacks on Curve25519 using Order 4 Rational Points. 2019. 2019. 69-74
An Efficient Algorithm to Determine Equivalence of Pipelined Dependency Graphs for Their Simplification. 2017. 100. 6. 616-626
Attempt for Determining Cryptographic Circuit Blocks Leaking Side-Channel Information Based on Internal Current Source : Examination with FPGA Implementation of AES Circuits. 2016. 116. 253. 79-84
Yasuyuki Nogami, Hiroto Kagotani, Kengo Iokibe, Hiroyuki Miyatake, Takashi Narita. FPGA Implementation of Various Elliptic Curve Pairings over Odd Characteristic Field with Non Supersingular Curves. IEICE Trans. Inf. Syst. 2016. 99-D. 4. 805-815
Iokibe Kengo, Tai Nobuhiro, Kagotani Hiroto, Onishi Hiroyuki, Toyota Yoshitaka, Watanabe Tetsushi. Analysis of Side-channel Information Leaking Behavior in Cryptographic Circuit using Internal Current Source. IEEJ Transactions on Fundamentals and Materials. 2016. 136. 6. 365-371

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MISC (9)：

Evaluation of parallelization for multiple-precision Cyclic Vector Multiplication Algorithm using CUDA. 2014. 2014. 19. 1-4
Reduction Method of Asynchronous Circuits with Maximum Delay Loops using SDI Delay Assumption. 2014. 2014. 8. 1-6
Memory Saving Implementation of Cyclic Vector Multiplication Algorithm. 2011. 2011. 23. 1-6
Memory Saving Implementation of Cyclic Vector Multiplication Algorithm. 2011. 2011. 23. 1-6
KAGOTANI H. A synthesis method of quasi-delay-insensitive processors based on dependency graph. Asia-Pacific Conference on Hardware Description Languages (APCHDL), 1994. 1994

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Professional career (1)：

博士(工学) (東京工業大学)

Work history (4)：

2020/04 - 現在 Okayama University Institute for Education and Student Services
2005/04 - 2020/03 Okayama University The Graduate School of Natural Science and Technology
1998/07 - 2005/03 Okayama University Faculty of Engineering
1994/10 - 1998/06 Okayama University Faculty of Engineering

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