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J-GLOBAL ID:201302264720555168   Reference number:13A0620224

Input Pattern Parallel Logic Simulation of Combinatorial Circuits Using GP-GPU

GPGPUによる組み合わせ論理回路の入力パタン並列論理シミュレーション
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Issue: 42  Page: 63-70  Publication year: Mar. 31, 2013
JST Material Number: Z0744C  ISSN: 1348-3323  Document type: Article
Article type: 原著論文  Country of issue: Japan (JPN)  Language: JAPANESE (JA)
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Graphic and image processing in general 
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