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J-GLOBAL ID:201402267848532922   Reference number:14A1154777

Identifying Program Loop Nesting Structures during Execution of Machine Code

機械語実行におけるプログラムループ入れ子構造の特定
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Volume: E97.D  Issue:Page: 2371-2385 (J-STAGE)  Publication year: 2014 
JST Material Number: U0469A  ISSN: 1745-1361  Document type: Article
Article type: 原著論文  Country of issue: Japan (JPN)  Language: ENGLISH (EN)
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System programmings in general 
Reference (32):
  • [1] J. Larus, “Spending Moore's dividend,” Commun. ACM, vol.52, no.5, pp.62-69, May 2009.
  • [2] J.L. Henning, “SPEC CPU suite growth: An historical perspective,” SIGARCH Comput. Archit. News, vol.35, no.1, pp.65-68, March 2007.
  • [3] M. Terai, H. Murai, K. Minami, M. Yokokawa, and E. Tomiyama, “K-scope: A java-based fortran source code analyzer with graphical user interface for performance improvement,” Third International Workshop on Parallel Software Tools and Tool Infrastructures (PSTI 2012), pp.434-443, 2012.
  • [4] P. Havlak, “Nesting of reducible and irreducible loops,” ACM Trans. Program. Lang. Syst., vol.19, no.4, pp.557-567, 1997.
  • [5] M. Hall, J. Chame, C. Chen, J. Shin, G. Rudy, and M.M. Khan, “Loop transformation recipes for code generation and auto-tuning,” 22nd International Workshop on Languages and Compilers for Parallel Computing, LCPC 2009, Lect. Notes Comput. Sci., 2010.
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