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J-GLOBAL ID:201502210667553550   Reference number:15A0948677

Theory and Measurement of Reset Noise Suppression in CTIA Readout Circuits

CTIA読み出し回路におけるリセットノイズ抑圧の理論と測定
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Volume: E98.C  Issue:Page: 899-902 (J-STAGE)  Publication year: 2015 
JST Material Number: U0468A  ISSN: 1745-1353  Document type: Article
Article type: 原著論文  Country of issue: Japan (JPN)  Language: ENGLISH (EN)
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Manufacturing technology of solid-state devices  ,  Amplification circuits 
Reference (9):
  • [1] L.-W. Huang, C.-C. Hsieh, W.-H. Chang, Y.-Z. Juang, and C.-F. Chiu, “A 1.8V readout integrated circuit with adaptive transimpedance control amplifier for IR focal plane arrays,” 2011 IEEE Sensors Conf., Limerick, Ireland, pp.1145-1148, Oct. 2011.
  • [2] S.-L. Liu, Y.-C. Zhang, X.-Y. Meng, W.-G. Lu, and Z.-J. Chen, “A design of readout circuit for 384×288 uncooled microbolometer infrared focal plane array,” in Proc. IEEE ICSICT, Xian, pp.1-3, Oct. 29-Nov. 1 2012.
  • [3] S. Adachi, A. Nishimura, T. Yoshimuta, K. Tanabe, and S. Okamura, “A 128-channel CMOS charge readout ASIC for flat-panel X-ray detectors,” IEEE Trans. Nucl. Sci., vol.55, no.6, pp.3673-3683, Dec. 2008.
  • [4] Manickam, R. Singh, S. Ayazian, and A. Hassibi, “Front-end integrated circuits for high-performance biological and chemical sensing,” in Proc. IEEE MWSCAS, Seoul, Korea, pp.1-4, Aug. 2011.
  • [5] B. Pain, T.J. Cunningham, B. Hancock, G. Yang, S. Seshadri, and M. Ortiz, “Reset noise suppression in two-dimensional CMOS photodiode pixels through column-based feedback-reset,” in Proc. IEEE IEDM, San Francisco, USA, pp.809-812, Dec. 2002.
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