Art

J-GLOBAL ID：201502213896813360   Reference number：15A0948383

A 3D FPGA Architecture to Realize Simple Die Stacking

簡単なチップ積層を実現する3D FPGAアーキテクチャ

Author (5)： AMAGASAKI Motoki (Kumamoto Univ.) ,  ZHAO Qian (Kumamoto Univ.) ,  IIDA Masahiro (Kumamoto Univ.) ,  KUGA Morihiro (Kumamoto Univ.) ,  SUEYOSHI Toshinori (Kumamoto Univ.)
Material： IPSJ Transactions on System LSI Design Methodology (Web)  (情報処理学会論文誌トランザクション System LSI Design Methodology(Web))
Volume： 8  Page： 116-122 (J-STAGE)  Publication year： 2015 
JST Material Number： U0110A  ISSN： 1882-6687  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： *FPGA ,  micro circuit technique ,  *integrated circuit ,  three dimension ,  *spatial distribution ,  laminate structure ,  scaling ,  bump ,  bonding ,  *three-dimensional integrated circuit
Semi thesaurus term： VLSI architecture ,  micro bump

JST classification (1)： Hydrid integrated circuit  (NC03163K)

Reference (13)：

• [1] Alexander, M.J., Cohoon, J.P., Colflesh, J.L., Karro, J., Robins, G. and Science, C.: Three-Dimensional Field-Programmable Gate Arrays, Proc. 8th Annual IEEE International ASIC Conference and Exhibit, pp.253-256 (Sep. 1995).
• [2] Gayasen, A., Narayanan, V., Kandemir, M. and Rahman, A.: Designing a 3-D FPGA: Switch Box Architecture and Thermal Issues, IEEE Trans. VLSI Systems, Vol.16, No.7, pp.882-893 (2008).
• [3] Naoto, T., Ishida, T., Onoduka, T., Nishigoori, M., Nakayama, T., Ueno, Y., Ishimoto, Y., Suzuki, A., Chung, W., Madurawe, R., Wu, S., Ikeda, S. and Oyamatsu, H.: World's first monolithic 3D-FPGA with TFT SRAM over 90nm 9 layer Cu CMOS, Proc. VLSIT, pp.219-220 (June 2010).
• [4] Ababei, C., Mogal, H. and Bazargan, K.: Three-dimensional Place and Route for FPGAs, IEEE Trans. CAD of Integrated Circuits and Systems, Vol.25, No.6, pp.1132-1140 (2006).
• [5] Hamada, T., Zhao, Q., Amagasaki, M., Iida, M., Kuga, M. and Sueyoshi, T.: Three-Dimensional Stacking FPGA Architecture Using Face-to-Face Integration, Proc. VLSI-SoC, pp.196-201 (Oct. 2013).

Terms in the title (3)： 3D ,  FPGA ,  アーキテクチャ