Art
J-GLOBAL ID:201502259588427288
Reference number:15A0337712
アクセスの局所性に着目したSTT-MRAMキャッシュの周辺回路の電源制御手法
Author (7):
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Material:
Volume:
2014
Issue:
ARC-211
Page:
VOL.2014-ARC-211,NO.11 (WEB ONLY)
Publication year:
Jul. 21, 2014
JST Material Number:
U0451A
Document type:
Proceedings
Article type:
原著論文
Country of issue:
Japan (JPN)
Language:
JAPANESE (JA)
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Semi thesaurus term:
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
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JST classification (1):
JST classification
Category name(code) classified by JST.
Control systems
Reference (8):
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Binkert, N., Beckmann, B., Black, G., Reinhardt, S. K., Saidi, A., Basu, A., Hestness, J., Hower, D. R., Krishna, T., Sardashti, S., Sen, R., Sewell, K., Shoaib, M., Vaish, N., Hill, M. D. and Wood, D. A.: The Gem5 Simulator, SIGARCH Computer Architure News, Vol. 39, No. 2, pp. 1-7 (2011).
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Henning, J. L.: SPEC CPU2006 Benchmark Descriptions, SIGARCH Computer Architure News, Vol. 34, No. 4, pp. 1-17 (2006).
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Kitagawa, E., Fujita, S., Nomura, K., Noguchi, H., Abe, K., Ikegami, K., Daibou, T., Kato, Y., Kamata, C., Kashiwada, S., Shimomura, N., Ito, J. and Yoda, H.: Impact of Ultra Low Power and Fast Write Operation of Advance Perpendicular MTJ on Power Reduction for High-Performance Mobile CPU, IEDM, pp. 677-680 (2012).
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Li, S., Chen, K., Ahn, J.-H., Brockman, J. and Jouppi, N.: CACTI-P: Architecture-Level Modeling for SRAM-based Structures with Advanced Leakage Reduction Techniques, ICCAD, pp. 694-701 (2011).
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Muralimanohar, N. and Balasubramonian, R.: CACTI 6.0: A Tool to Understand Large Caches.
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