Rchr
J-GLOBAL ID:201601012444697255   Update date: Apr. 06, 2024

Kobayashi Masaharu

コバヤシ マサハル | Kobayashi Masaharu
Affiliation and department:
Homepage URL  (1): http://nano-lsi.iis.u-tokyo.ac.jp/
Research field  (3): Electrical power engineering ,  Electronic devices and equipment ,  Electronic devices and equipment
Research keywords  (8): 機械学習 ,  AI ,  Ferroelectric device ,  Integrated Device ,  IoT ,  Low power device ,  Memory device ,  CMOS transistor
Research theme for competitive and other funds  (12):
  • 2021 - 2024 酸化物半導体と強誘電体HfO2の融合による三次元集積デバイスとその応用技術の創出
  • 2021 - 2024 超低電力ニューロモルフィックハードウェア基盤技術のブレークスルー
  • 2020 - 2023 ナノスケール強誘電体トランジスタの研究開発と機械学習アクセラレータへの応用
  • 2019 - 2022 原子層ヘテロ構造の完全制御成長と超低消費電力・3次元集積デバイスの創出
  • 2018 - 2021 Research and development of nanosheet wireless probe enabling multiple and simultaneous probe for neuron activity signal and neurotransmitter
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Papers (342):
  • Kaito Hikake, Zhuo Li, Junxiang Hao, Chitra Pandy, Takuya Saraya, Toshiro Hiramoto, Takanori Takahashi, Mutsunori Uenuma, Yukiharu Uraoka, Masaharu Kobayashi. A Nanosheet Oxide Semiconductor FET Using ALD InGaOx Channel for 3-D Integrated Devices. IEEE Transactions on Electron Devices. 2024. 1-7
  • Hirokazu Fujiwara, Yuki Itoya, Masaharu Kobayashi, Cédric Bareille, Shik Shin, Toshiyuki Taniuchi. Nondestructive imaging of breakdown process in ferroelectric capacitors using in situ laser-based photoemission electron microscopy. Applied Physics Letters. 2023. 123. 17
  • Kaito Hikake, Zhuo Li, Junxiang Hao, Chitra Pandy, Takuya Saraya, Toshiro Hiramoto, Takanori Takahashi, Mutsunori Uenuma, Yukiharu Uraoka, Masaharu Kobayashi. A Nanosheet Oxide Semiconductor FET Using ALD InGaOx Channel and InSnOx Electrode with Normally-off Operation, High Mobility and Reliability for 3D Integrated Devices. 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). 2023
  • Masaharu Kobayashi. Monolithic 3D Integration and 3D-Memory Technology Enabled by Oxide-Semiconductor. 2023
  • 高橋崇典, 上沼睦典, 小林正治, 浦岡行治. 三次元集積デバイス応用に向けた原子層堆積法で成膜した三元系非晶質酸化物半導体In-Ga-O. 2022年第70回応用物理学会春季学術講演会,上智大学. 2023. 17p-E302-7
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MISC (16):
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Patents (11):
  • 不揮発性記憶素子
  • Process variability tolerant hard mask for replacement metal gate finFET devices
  • III-V compound semiconductor material passivation with crystalline interlayer
  • Transistor formation using cold welding
  • Method and structure for compound semiconductor contact
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Education (3):
  • 2006 - 2010 Stanford University Electrical Engineering
  • 2004 - 2006 The University of Tokyo Electrical Engineering
  • 2000 - 2004 The University of Tokyo Liberal arts/School of Engineering Electronics and Information Engineering
Professional career (1):
  • 電子工学専攻 (Stanford大学)
Work history (9):
  • 2019/10 - 現在 The University of Tokyo
  • 2014/05 - 現在 The University of Tokyo Institute of Industrial Science Associate Professor
  • 2019/04 - 2019/09 The University of Tokyo VLSI (Very Scale Integration Large) Design and Education Center
  • 2010/02 - 2014/04 IBM corporation Watson Research Center Research Staff Member
  • 2006/09 - 2010/01 Stanford University Ph.D degree
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Committee career (11):
  • 2019/04 - 現在 応用物理学会 JJAP/APEX論文編集委員
  • 2018/04 - 現在 電気学会 技術調査専門委員会
  • 2018/04 - 現在 IEEE Electron Device Society (EDS) Japan Joint Chapter 幹事
  • 2018/04 - 現在 IEEE International Electron Device Meeting (IEDM) サブコミッティー
  • 2017/04 - 現在 応用物理学会 プログラム編集委員
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Awards (16):
  • 2024/02 - IEEE EDS Japan Joint Chapter IEEE EDS Japan Joint Chapter Student Award A Nanosheet Oxide Semiconductor FET Using ALD InGaOx Channel and InSnOx Electrode with Normally-Off Operation, High Mobility and Reliability for 3D Integrated Devices
  • 2023/12 - IEEE EDS Leo Esaki Award Efficient Erase Operation by GIDL Current for 3D Structure FeFETs With Gate Stack Engineering and Compact Long-Term Retention Model
  • 2022/12 - IEEE EDS IEEE EDS Paul Rappaport Award Monolithic Integration of Oxide Semiconductor FET and Ferroelectric Capacitor Enabled y Sn-Doped InGaZnO for 3-D Embedded RAM Application
  • 2021/08 - Silicon Nano Workshop Best Student Paper Award Experimental Demonstration of HfO2-based Ferroelectric FET with MoS2 Channel for High-Density and Low-Power Memory Application
  • 2020/12 - IEEE EDS IEEE EDS Leo Esaki Award Ferroelectric HfO2 Tunnel Junction Memory with High TER and Multi-level Operation Featuring Metal Replacement Process
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Association Membership(s) (4):
THE JAPANESE SOCIETY FOR ARTIFICIAL INTELLIGENCE ,  THE INSTITUTE OF ELECTRICAL ENGINEERS OF JAPAN ,  IEEE ,  THE JAPAN SOCIETY OF APPLIED PHYSICS
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