Art
J-GLOBAL ID:201602008762548028   Reference number:65A0173459

Completeness of sets of delayedlogic devices.

遅延を伴なう論理素子の組の完全性
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Material:
Volume: 8014  Issue:Page: 157-172  Publication year: 1965 
JST Material Number: C0233A  CODEN: IEECA   Document type: Article
Article type: 原著論文  Country of issue: United States (USA) 
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