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J-GLOBAL ID：201602016336388385   Reference number：70A0260813

Minimization of Exclusive OR and Logical Equivalence switching circuits.

排地的論理和と論理同値からなる論理回路の最小化
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Author (2)：
MUKHOPADHYAY A

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SCHMITZ G

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Material：
IEEE Trans Comput  (IRE Transactions on Electronics Computers)

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Volume： 19  Issue： 2  Page： 132-140  Publication year： 1970 
JST Material Number： C0233A  ISSN： 0018-9340  CODEN： ICTOB4  Document type： Article
Article type： 原著論文  Country of issue： United States (USA)  Language： ENGLISH (EN)
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論理関数

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論理

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, 
論理回路

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, 
最小化

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