Art

J-GLOBAL ID：201602208472180140   Reference number：16A0004108

Data-Transfer-Aware Design of an FPGA-Based Heterogeneous Multicore Platform with Custom Accelerators

カスタム加速器を有したFPGAベース異種マルチコアプラットフォームのデータ転送意識設計

Author (4)： TAKEI Yasuhiro (Tohoku Univ.) ,  WAIDYASOORIYA Hasitha M. (Tohoku Univ.) ,  HARIYAMA Masanori (Tohoku Univ.) ,  KAMEYAMA Michitaka (Tohoku Univ.)
Material： IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences (Web)  (IEICE Trans Fundam Electron Commun Comput Sci (Web))
Volume： E98.A  Issue： 12  Page： 2658-2669 (J-STAGE)  Publication year： 2015 
JST Material Number： U0466A  ISSN： 1745-1337  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： *property ,  *computer architecture ,  *FPGA ,  customizing ,  accelerator ,  central processing unit ,  data transfer ,  system architecture ,  design ,  methodology ,  machining time
Semi thesaurus term： CPU core ,  *multi-core architecture ,  *heterogeneity ,  reconfigurable architecture ,  processing time

JST classification (1)： Control systems  (JC02030K)

Reference (23)：

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• [5] Y. Takei, H.M. Waidyasooriya, M. Hariyama, and M. Kameyama, “Evaluation of an FPGA-based heterogeneous multicore platform with SIMD/MIMD custom accelerators,” IEICE Trans. Fundamentals, vol.E96-A, no.12, pp.2576-2586, 2013.

Terms in the title (7)： 加速器 ,  FPGA ,  マルチコア ,  プラットフォーム ,  データ転送 ,  意識 ,  設計