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J-GLOBAL ID:201602208472180140   Reference number:16A0004108

Data-Transfer-Aware Design of an FPGA-Based Heterogeneous Multicore Platform with Custom Accelerators

カスタム加速器を有したFPGAベース異種マルチコアプラットフォームのデータ転送意識設計
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Volume: E98.A  Issue: 12  Page: 2658-2669 (J-STAGE)  Publication year: 2015 
JST Material Number: U0466A  ISSN: 1745-1337  Document type: Article
Article type: 原著論文  Country of issue: Japan (JPN)  Language: ENGLISH (EN)
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Control systems 
Reference (23):
  • [1] H. Shikano, M. Ito, M. Onouchi, T. Todaka, T. Tsunoda, T. Kodama, K. Uchiyama, T. Odaka, T. Kamei, E. Nagahama, M. Kusaoke, Y. Nitta, Y. Wada, K. Kimura, and H. Kasahara, “Heterogeneous multi-core architecture that enables 54x AAC-LC stereo encoding,” IEEE J. Solid-State Circuits, vol.43, no.4, pp.902-910, 2008.
  • [2] H. Kondo, M. Nakajima, N. Masui, S. Otani, N. Okumura, Y. Takata, T. Nasu, H. Takata, T. Higuchi, M. Sakugawa, H. Fujiwara, K. Ishida, K. Ishimi, S. Kaneko, T. Itoh, M. Sato, O. Yamamoto, and K. Arimoto, “Design and implementation of a configurable heterogeneous multicore SoC with nine CPUs and two matrix processors,” IEEE J. Solid-State Circuits, vol.43, no.4, pp.892-901, 2008.
  • [3] S. Dutta, V. Rajagopolan, B. Taylor and R. Wittig, “Xilinx Zynq embedded processing platform” A Symp. High Performance Chips (HOT Chips 23), 2011.
  • [4] https://www.altera.com/products/soc/portfolio/cyclone-v-soc/overview.html
  • [5] Y. Takei, H.M. Waidyasooriya, M. Hariyama, and M. Kameyama, “Evaluation of an FPGA-based heterogeneous multicore platform with SIMD/MIMD custom accelerators,” IEICE Trans. Fundamentals, vol.E96-A, no.12, pp.2576-2586, 2013.
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