Art
J-GLOBAL ID：201602228590714043   Reference number：13A1962655

A Low Latency High Throughput Multiply-accumulator Unit for Float Point and Integer

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Author (3)：
Shen Jun

About Shen Jun

(Inst. of VLSI Design, Zhejiang Univ., Hangzhou)

About Inst. of VLSI Design, Zhejiang Univ., Hangzhou

, 
Shen Haibin

About Shen Haibin

(Inst. of VLSI Design, Zhejiang Univ., Hangzhou)

About Inst. of VLSI Design, Zhejiang Univ., Hangzhou

, 
Yu Yulong

About Yu Yulong

(Inst. of VLSI Design, Zhejiang Univ., Hangzhou)

About Inst. of VLSI Design, Zhejiang Univ., Hangzhou


Material：
Jisuanji Gongcheng  (Computer Engineering)

About Jisuanji Gongcheng


Volume： 39  Issue： 6  Page： 91-94,102  Publication year： 2013 
JST Material Number： C2532A  ISSN： 1000-3428  CODEN： JISGEV  Document type： Article
Country of issue： China (CHN)  Language： CHINESE (ZH)
Abstract/Point：
Abstract/Point
Japanese summary of the article(about several hundred characters).
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