Art

J-GLOBAL ID：201602271794969825   Reference number：16A1366712

FPGA Implementation and Evaluation of Ternary Content Addressable Memory with Individuality

個性を考慮した3値のアドレス指定可能なメモリのFPGA実装と評価

Author (6)： Kimura Shinya (Department of VLSI System Design, Ritsumeikan University) ,  Watanabe Takuma (Department of VLSI System Design, Ritsumeikan University) ,  Yukawa Ryohei (Department of VLSI System Design, Ritsumeikan University) ,  Kumaki Takeshi (Department of VLSI System Design, Ritsumeikan University) ,  Fujita Tomohiro (Department of VLSI System Design, Ritsumeikan University) ,  Ogura Takeshi (Department of VLSI System Design, Ritsumeikan University)
Material： Journal of Signal Processing (Web)  (信号処理(Web))
Volume： 20  Issue： 4  Page： 137-140(J-STAGE)  Publication year： 2016 
JST Material Number： U0425A  ISSN： 1880-1013  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： *individuality ,  FPGA ,  *packaging (mounting) ,  *associative memory ,  LSI ,  word ,  mask ,  reproducibility ,  Time ,  data retrieval ,  *Ternary Content Addressable Memory
Semi thesaurus term： *FPGA Implementation ,  word ,  motion time

JST classification (2)： General  (NC03161C) ,  Logic circuits  (NC05070B)

Reference (12)：

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• [4] R. Yukawa, T. Kumaki, T. Fujita and T. Ogura: Ternary content addressable memory with individuality on FPGA, International Symposium on Nonlinear Theory and its Applications (NOLTA), pp. 1-4, 2015.
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Terms in the title (5)： 個性 ,  3値 ,  アドレス指定 ,  FPGA実装 ,  評価