Art
J-GLOBAL ID:201602277564071796   Reference number:16A0876331

A Survey and Evaluation of FPGA High-Level Synthesis Tools

FPGA高水準合成ツールの調査と評価【Powered by NICT】
Author (12):
Material:
Volume: 35  Issue: 10  Page: 1591-1604  Publication year: 2016 
JST Material Number: B0142C  ISSN: 0278-0070  CODEN: ITCSDI  Document type: Article
Article type: 原著論文  Country of issue: United States (USA)  Language: ENGLISH (EN)
Abstract/Point:
Abstract/Point
Japanese summary of the article(about several hundred characters).
All summary is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
High-level synthesis (HLS) is ...
   To see more with JDream III (charged).   {{ this.onShowAbsJLink("http://jdream3.com/lp/jglobal/index.html?docNo=16A0876331&from=J-GLOBAL&jstjournalNo=B0142C") }}
Thesaurus term:
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.

Semi thesaurus term:
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
, 【Automatic Indexing@JST】
JST classification (3):
JST classification
Category name(code) classified by JST.
CAD,CAM  ,  Semiconductor integrated circuit  ,  General 
Terms in the title (5):
Terms in the title
Keywords automatically extracted from the title.

Return to Previous Page