Art
J-GLOBAL ID:201702217179689297   Reference number:17A1223547

Self-stabilization techniques for intermediate power level in stacked-Vdd integrated circuits using DC-balanced coding methods

DC平衡コーディング法を利用する積層-Vdd集積回路における中間電力レベルのための自己安定化技術
Author (9):
Material:
Volume: 55  Issue: 4S  Page: 04EF06.1-04EF06.7  Publication year: Apr. 2016 
JST Material Number: G0520B  ISSN: 0021-4922  CODEN: JJAPB6  Document type: Article
Article type: 原著論文  Country of issue: United Kingdom (GBR)  Language: ENGLISH (EN)
Thesaurus term:
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.

Semi thesaurus term:
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.

JST classification (2):
JST classification
Category name(code) classified by JST.
Semiconductor integrated circuit  ,  Power source circuit 
Reference (30):
  • T. Ghani, K. Mistry, P. Packan, S. Thompson, M. Stettler, S. Tyagi, and M. Bohr, Symp. VLSI Technology, 2000, p. 174.
  • B. H. Calhoun, S. Khanna, R. Mann, and J. Wang, ISCAS, 2009, p. 2541.
  • R. Gonzalez, B. M. Gordon, and M. A. Horowitz, IEEE J. Solid-State Circuits 32, 1210 (1997).
  • C. Lin, K. K. Das, L. Chang, R. Q. Williams, W. E. Haensch, and C. Hu, Int. Symp. VLSI Technology, Systems, and Applications, 2006, p. 24.
  • M. Horowitz, E. Alon, D. Patil, S. Naffziger, R. Kumar, and K. Bernstein, 20th Int. Conf. VLSI Design, 2007, p. 23.
more...

Return to Previous Page