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J-GLOBAL ID：201702220821448245   Reference number：17A1619560

A 100-MHz 51.2-Gb/s Packet Lookup Engine with Automatic Table Update Function

自動テーブル更新機能を持つ100MHz 51.2Gb/sパケットルックアップエンジン

Author (9)： IMAMURA Kousuke (Institute of Science and Engineering, Kanazawa University) ,  HONDA Ryota (College of Science and Engineering, Kanazawa University) ,  HONDA Ryota (Osaka Design Center, Shikino High-Tech Co., Ltd.) ,  KAWAMURA Yoshifumi (College of Science and Engineering, Kanazawa University) ,  MIURA Naoki (Science and Core Technology Group, NTT) ,  URANO Masami (Science and Core Technology Group, NTT) ,  SHIGEMATSU Satoshi (Science and Core Technology Group, NTT) ,  MATSUMURA Tetsuya (College of Engineering, Nihon University) ,  MATSUDA Yoshio (Institute of Science and Engineering, Kanazawa University)
Material： IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences (Web)  (IEICE Trans Fundam Electron Commun Comput Sci (Web))
Volume： E100.A  Issue： 10  Page： 2123-2134(J-STAGE)  Publication year： 2017 
JST Material Number： U0466A  ISSN： 1745-1337  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： *data retrieval ,  *renewal ,  *automation ,  packet ,  embedded system ,  trial manufacture ,  throughput ,  energy consumption ,  semiconductor process
Semi thesaurus term： *table lookup ,  high throughput ,  CMOS process

Author keywords (6)： lookup engine ,  packet inspection ,  mismatch detection ,  hash search ,  rule registration ,  rule deletion

JST classification (2)： Data communication  (ND11040A) ,  Semiconductor integrated circuit  (NC03162T)

Reference (21)：

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Terms in the title (1)： 更新