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J-GLOBAL ID:201702242768990826   Reference number:17A0901591

性能カウンタを用いた近似実行の高速なエミュレーション

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Volume: 2017  Issue: OS-141  Page: Vol.2017-OS-141,No.12,1-9 (WEB ONLY)  Publication year: Jul. 19, 2017 
JST Material Number: U0451A  Document type: Proceedings
Article type: 原著論文  Country of issue: Japan (JPN)  Language: JAPANESE (JA)
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Operating systems  ,  Computer networks  ,  Digital computer systems in general  ,  Memory units 
Reference (18):
  • Akiyama, S. and Hirofuchi, T.: Quantitative Evaluation of Intel PEBS Overhead for Online System-Noise Analysis, International Workshop on Runtime and Operating Systems for Supercomputers (ROSS), pp. 1-8 (2017).
  • Carbin, M., Misailovic, S. and Rinard, M. C.: Verifying Quantitative Reliability for Programs That Execute on Unreliable Hardware, International Conference on Object Oriented Programming Systems Languages & Applications (OOPSLA), pp. 33-52 (2013).
  • Chang, K. K., Kashyap, A., Hassan, H., Ghose, S., Hsieh, K., Lee, D., Li, T., Pekhimenko, G., Khan, S. and Mutlu, O.: Understanding Latency Variation in Modern DRAM Chips: Experimental Characterization, Analysis, and Optimization, International Conference on Measurement and Modeling of Computer Science (SIGMETRICS), pp. 323-336 (2016).
  • Chen, D., Ye, C. and Ding, C.: Write Locality and Optimization for Persistent Memory, International Symposium on Memory Systems (MEMSYS), pp. 77-87 (2016).
  • ELPIDA: Low Power Function of Mobile RAM - Partial Array Self Refresh (PASR), (online), available from <https://www.micron.com/~/media/documents/products/technical-note/dram/e0597e10.pdf> (2005).
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