Art

J-GLOBAL ID：201702247434202983   Reference number：17A1636996

A G-band SPST switch with 2.4-dB insertion loss and minimum 28.5-dB isolation using grounded co-planar waveguide folded coupled line topology in 65-nm CMOS technology

2.4dB挿入損のGバンドSPSTスイッチと65nm CMOS技術における接地コプレーナ導波路折畳まれた結合線路トポロジーを用いた最小28.5dB分離【Powered by NICT】

Author (7)： Wang Yunshan (Department of Electrical Engineering and Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan, 106, R.O.C.) ,  Chen Chun-Nien (Department of Electrical Engineering and Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan, 106, R.O.C.) ,  Ye Yu (Department of Electrical and Computer Engineering, University of California, Davis, CA 95616) ,  Chen Yen-Chih (Department of Electrical Engineering and Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan, 106, R.O.C.) ,  Yu Bo (Department of Electrical and Computer Engineering, University of California, Davis, CA 95616) ,  Gu Qun Jane (Department of Electrical and Computer Engineering, University of California, Davis, CA 95616) ,  Wang Huei (Department of Electrical Engineering and Graduate Institute of Communication Engineering, National Taiwan University, Taipei, Taiwan, 106, R.O.C.)
Material： IEEE Conference Proceedings  (IEEE Conf Proc)
Volume： 2017  Issue： IMS  Page： 1718-1721  Publication year： 2017 
JST Material Number： W2441A  Document type： Proceedings
Article type： 原著論文  Country of issue： United States (USA)  Language： ENGLISH (EN)

Abstract/Point： A G-Band single pole single th...

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Thesaurus term： *earth(ground connection) ,  *insertion loss ,  *switch ,  frequency(Hz) ,  *coplanar waveguide ,  *complementary metal oxide semiconductor ,  folding(morphology) ,  *topology
Semi thesaurus term： CMOSプロセス ,  チップ面積 ,  *結合線路 , 【Automatic Indexing@JST】

JST classification (3)： Other transmission circuit elements  (NC04070U) ,  Transistors  (NC03070N) ,  Relays and switches  (NA05060K)

Terms in the title (7)： 挿入損 ,  Gバンド ,  CMOS技術 ,  接地 ,  コプレーナ導波路 ,  結合線路 ,  トポロジー