Shimizu Toru

シミズトオル | Shimizu Toru

Research field (1)： Computer systems

Research keywords (11)： System Verification , Design Verification , LSI , LSI Design , Embedded System , Low Power , SoC , Microcomputer , Microcontroller , Microprocessor , Computer Architecture

Research theme for competitive and other funds (1)：

2022 - 2025 畜産・酪農DXに向けた自律型牛生体・行動情報取得システム基盤の開拓

Papers (84)：

Shusuke YANAGAWA, Ryota SHIMIZU, Mototsugu HAMADA, Toru SHIMIZU, Tadahiro KURODA. Optimization of Resonant Capacitance in Wireless Power Transfer System with 3-D Stacked Two Receivers. IEICE Transactions on Electronics. 2018. E101.C. 7. 488-492
Shusuke Yanagawa, Ryota Shimizu, Mototsugu Hamada, Toru Shimizu, Tadahiro Kuroda. Wireless power transfer to stacked modules for IoT sensor nodes. Proceedings - International SoC Design Conference 2017, ISOCC 2017. 2018. 59-60
Ryota Shimizu, Shusuke Yanagawa, Toru Shimizu, Mototsugu Hamada, Tadahiro Kuroda. Convolutional neural network for industrial egg classification. Proceedings - International SoC Design Conference 2017, ISOCC 2017. 2018. 67-68
Toru Shimizu. Design Methodology in Wireless Power Transfer System for 3-D Stacked Multiple Receivers. IEEE International Symposium on Circuits and Systems (ISCAS). 2018
Shusuke Yanagawa, Ryota Shimizu, Mototsugu Hamada, Toru Shimizu, Tadahiro Kuroda. A Wireless Power Transfer System for 3-D Stacked Multiple Receivers. International SoC Design Conference (ISOCC). 2017

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MISC (31)：

Hiroaki Konno, Toru Shimizu. Generating a music score from a music video without duplication based on image similarity. 2024. 2306-2306
Miyu Fukushima, Toru Shimizu. Generating summaries of live concert videos with generative AI. 2024. 392-392
中田尚, 清水徹, 中村宏. The Normally-Off Computing Architecture for Low-power Iot Systems. 社団法人日本磁気学会研究会資料 = Bulletin of Topical Symposium of the Magnetics Society of Japan. 2015. 203. 45-48
Nakada Takashi, Okamoto Kazuya, Komoda Toshiya, Miwa Shinobu, Sato Yohei, Ueki Hiroshi, Hayashikoshi Masanori, Shimizu Toru, Nakamura Hiroshi. Design Aid of Multi-core Embedded Systems with Energy Model. IMT. 2014. 9. 4. 419-428
Takashi Nakada, Kazuya Okamoto, Toshiya Komoda, Shinobu Miwa, Yohei Sato, Hiroshi Ueki, Masanori Hayashikoshi, Toru Shimizu, Hiroshi Nakamura. Design aid of multi-core embedded systems with energy model. IPSJ Online Transactions. 2014. 7. 2014. 122-131

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Books (2)：

実用プロセッサ技術 [第3版]
ムイスリ出版 2021 ISBN:9784896412963
実用プロセッサ技術
ムイスリ出版 2012 ISBN:489641196X

Lectures and oral presentations (40)：

Technology trend of the computing platform
(2021)
クラウドとエッジ、コンピューティングプラットフォームの展望
(微細構造デバイス研究開発フォーラム令和元年度セミナー 2019)
ARM-SVE enabled post-K processor for energy efficiency and sustained application performance in HPC
(Vail Computer Elements Workshop 2019)
ヒトの尿データへのDeep Learning適用による肺がん判定の試行と標的物質の探索
(人工知能学会知識ベースシステム研究会資料 2015)
The Normally-Off Computing Architecture for Low-power Iot Systems
(社団法人日本磁気学会研究会資料 = Bulletin of Topical Symposium of the Magnetics Society of Japan 2015)

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Education (2)：

1981 - 1986 The University of Tokyo Faculty of Science Department of Information Science
1977 - 1981 The University of Tokyo Faculty of Science Department of Information Science

Professional career (3)：

学士(理学) (東京大学)
修士(理学) (東京大学大学院)
博士(理学) (東京大学大学院)

Work history (5)：

2018/04 - 現在 Toyo University
2014/10 - 2018/03 Keio University
2010/04 - 2014/09 Renesas Electronics Corporation
2002/04 - 2010/03 Renesas Technology Corporation
1986/04 - 2003/03 Mitsubishi Electric Corporation

Awards (2)：

2014/01 - IEEE Fellow Award Development of integrated multi-core microprocessors with large memories
1997/10 - R&D 100 Magazine R&D 100 Award M32R/D: RISC Microprocessor with Embedded DRAM

Association Membership(s) (3)：

THE JAPANESE SOCIETY FOR ARTIFICIAL INTELLIGENCE , THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS , IEEE

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