Art
J-GLOBAL ID:201802228025904740   Reference number:18A0727590

The Design and Implementation of Scalable Deep Neural Network Accelerator Cores

スケーラブルなディープニューラルネットワーク加速器コアの設計と実装【JST・京大機械翻訳】
Author (8):
Material:
Volume: 2017  Issue: MCSoC  Page: 13-20  Publication year: 2017 
JST Material Number: W2441A  Document type: Proceedings
Article type: 原著論文  Country of issue: United States (USA)  Language: ENGLISH (EN)
Abstract/Point:
Abstract/Point
Japanese summary of the article(about several hundred characters).
All summary is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
Due to the recent advances in ...
   To see more with JDream III (charged).   {{ this.onShowAbsJLink("http://jdream3.com/lp/jglobal/index.html?docNo=18A0727590&from=J-GLOBAL&jstjournalNo=W2441A") }}
Thesaurus term:
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.

Semi thesaurus term:
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
, 【Automatic Indexing@JST】
JST classification (2):
JST classification
Category name(code) classified by JST.
Computer networks  ,  Computer system development 
Terms in the title (5):
Terms in the title
Keywords automatically extracted from the title.

Return to Previous Page