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J-GLOBAL ID:201802240165568157   Reference number:18A0322484

FPGA accelerator of CNN using Power of 2 Approximation and Pruning weights

2のべき乗近似とプルーニングを用いたCNN向けFPGAアクセラレータ
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Volume: 117  Issue: 378(CPSY2017 106-132)  Page: 119-124  Publication year: Jan. 11, 2018 
JST Material Number: S0532B  ISSN: 0913-5685  Document type: Proceedings
Article type: 原著論文  Country of issue: Japan (JPN)  Language: JAPANESE (JA)
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Special-purpose arithmetic and control units  ,  Artificial intelligence  ,  Semiconductor integrated circuit 
Reference (14):
  • 岡谷貴之, ′′深層学習,′′ 株式会社講談社, April 2015
  • 麻生秀樹, 安藤宗樹, 前田新一, 岡野原大輔, 岡谷貴之, 久保陽太郎, ボレガラ ダヌシカ, 神嶌敏弘 (編), ′′深層学習,′′ 近代科学社, November 2015
  • A. Dundar, J. Jin, V. Gokhale, B. Martini and E. Culurciello, ′′Memory access optimized routing scheme for deep networks on a mobile coprocessor,′′ Proc. of the 2014 IEEE High Performance Extreme Computing Conference, pp.1-6, September 2014
  • Chen Zhang, Peng Li and Guangyu Sun, Yijin Guan and Bingjun Xiao, Jason Cong, ′′Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks,′′ Proc. of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, pp.161-170, February 2015
  • Qiu, Jiantao and Wang, Jie and Yao, Song and Guo, Kaiyuan and Li, Boxun and Zhou, Erjin and Yu, Jincheng and Tang, Tianqi and Xu, Ningyi and Song, Sen and Wang, Yu and Yang, Huazhong, ′′Going Deeper with Embedded FPGA Platform for Convolutional Neural Network,′′ Proc. of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, pp.26-35, February 2016
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