Art

J-GLOBAL ID：201802279061109451   Reference number：18A2212569

MTJ-based asynchronous circuits for Re-initialization free computing against power failures

電力故障に対する再初期化自由計算のためのMTJベース非同期回路【JST・京大機械翻訳】

Author (5)： Onizawa N. (Frontier Research Institute for Interdisciplinary Sciences, Tohoku University, Sendai 980-8578, Japan) ,  Onizawa N. (Research Institute of Electrical Communication, Tohoku University, Sendai 980-8577, Japan) ,  Imai M. (Department of Electronics and Information Theory, Hirosaki University, Hirosaki 036-8561, Japan) ,  Yoneda T. (National Institute of Informatics, Tokyo 101-8430, Japan) ,  Hanyu T. (Research Institute of Electrical Communication, Tohoku University, Sendai 980-8577, Japan)
Material： Microelectronics Journal  (Microelectron J)
Volume： 82  Page： 46-61  Publication year： 2018 
JST Material Number： A0186A  ISSN： 0026-2692  Document type： Article
Article type： 原著論文  Country of issue： United Kingdom (GBR)  Language： ENGLISH (EN)

Abstract/Point： This paper introduces CMOS/mag...

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Thesaurus term： benchmark ,  *synchronous circuit ,  nonvolatility ,  error rate ,  *electric power ,  complementary metal oxide semiconductor ,  backup ,  *asynchronous circuit ,  reliability(property) ,  phase locked loop ,  phase(topology) ,  *failure ,  safety ,  metastable state
Semi thesaurus term： オーバヘッド , 【Automatic Indexing@JST】

Author keywords (5)： Magnetic tunnel junction ,  Three-terminal MTJ ,  Write-error rate ,  Energy harvesting ,  Frequent power failures

JST classification (3)： Other electronic circuits  (NC05090X) ,  Logic circuits  (NC05070B) ,  Data protection  (JD01020V)

Terms in the title (5)： 故障 ,  再初期化 ,  計算 ,  MTJ ,  非同期回路