J-GLOBAL ID:201901012399947190   Update date: Jun. 29, 2020


Research field  (3): Thin-film surfaces and interfaces ,  Electronic devices and equipment ,  Electric/electronic material engineering
Research keywords  (10): Border Trap ,  Interface States Density ,  Deep Level Transient Spectroscopy (DLTS) ,  Electroluminescence(EL) ,  Photoluminescence(PL) ,  Ge On Insulator ,  Local Strain ,  Metal/Semiconductor Contact ,  Ge-MOSFET ,  Ge Optical Device
Research theme for competitive and other funds  (4):
  • 2017 - 2020 Ge-On-Insulator基板上への局所歪み導入によるGe-光素子の高性能化
  • 2014 - 2017 Development of basic technology for Ge-CMOS integratable high-performance Ge optical devices
  • 2011 - 2013 Development of local-strain technology for crystalline Ge and its application to transistors
  • 2009 - 2011 Precise strain evaluation for high-performance bipolar transistor
Papers (114):
  • Ryusei Oka, Keisuke Yamamoto, Hiroshi Akamine, Dong Wang, Hiroshi Nakashima, Shigeomi Hishiki, Keisuke Kawamura. High interfacial quality metal-oxide-semiconductor capacitor on (111) oriented 3C-SiC with Al2O3 interlayer and its internal charge analysis. Japanese Journal of Applied Physics. 2020. 59. SG. SGGD17-1-SGGD17-10
  • Hiroshi Nakashima, Wei-Chen Wen, Keisuke Yamamoto, Dong Wang. Border-Trap Characterization for Ge Gate Stacks Using Deep-Level Transient Spectroscopy. The Electrochemical Society Transactions. 2019. 92. 4. 3-10
  • K. Yamamoto, K. Nakae, H. Akamine, D. Wang, H. Nakashima, Md. M Alam, K. Sawano, Z. Xue, M. Zhang, Z. Di. Conduction Type Control of Ge-on-Insulator: Combination of Smart-CutTM and Defect Elimination. The Electrochemical Society Transactions. 2019. 93. 1. 73-77
  • R. Oka, K. Yamamoto, DONG WANG, H. Nakashima, S. Hishiki, K. Kawamura. Demonstration of n-MOSFET operation and internal charge analysis of SiO2/Al2O3 gate dielectric on (111) oriented 3C-SiC. Extended Abstracts of the 2019 International Conference on Solid State Devices and Materials (SSDM2019). 2019
  • K. Iseri, W.-C. Wen, K. Yamamoto, DONG WANG, H. Nakashima. Low Temperature (<300°C) Fabrication of Ge MOS Structure for Advanced Electronic Devices. Extended Abstracts of the 2019 International Conference on Solid State Devices and Materials (SSDM2019). 2019
MISC (1):
  • Keisuke Yamamoto, Dong Wang, Hiroshi Nakashima. Fermi Level Pinning Alleviation at the TiN, ZrN, and HfN/Ge Interfaces. 2014 7TH INTERNATIONAL SILICON-GERMANIUM TECHNOLOGY AND DEVICE MEETING (ISTDM). 2014. 91-92
Lectures and oral presentations  (24):
  • Enhancement of direct band gap electroluminescence in asymmetric metal/Ge/metal diodes
    (TACT 2019 International Thin Film Conference 2019)
  • Direct band gap electroluminescence and photo detection in asymmetric metal/Ge/metal diodes
    (Collaborative Conference on Materials Research (CCMR) 2018 2018)
  • Towards an energy-saving society - the shrinking transistors
    (CAMPUS Asia EEST 2nd stage Kick-off Symposium 2017)
  • Direct band gap light emission and detection at room temperature in bulk Ge diodes
    (The 2nd Joint Symposium of Kyushu University and Yonsei University 2016)
  • Direct band gap light emission and detection in lateral HfGe/Ge/TiN diodes
    (The American Vacuum Society (AVS) 2015 Shanghai Thin Film (TF) Conference 2015)
Education (2):
  • 1995 - 2000 Jilin University College of Physics, Graduate School Department of Optics
  • 1991 - 1995 Jilin University Department of Physics, Undergraduate School Course of Optics
Work history (8):
  • 2012/02 - 現在 Kyushu University Associate Professor
  • 2008/04 - 2012/01 Kyushu University Research Associate Professor
  • 2006/04 - 2008/03 JSPS Postdoctral Fellowship for Overseas Researchers
  • 2004/04 - 2006/03 Kyushu University Research Fellow
  • 2002/04 - 2004/03 Fukuoka IST Research Fellow
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Association Membership(s) (1):
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