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J-GLOBAL ID：201902112109715460   Reference number：19S2519473

256-Mb DRAM Circuit Technologies for File Applications

Author (19)： Kitsukawa, Goro (Central Research Laboratory, Hitachi Ltd.) ,  Horiguchi, Masashi (Central Research Laboratory, Hitachi Ltd.) ,  Kawahara, Takayuki (Central Research Laboratory, Hitachi Ltd.) ,  Aoki, Masakazu (Central Research Laboratory, Hitachi Ltd.) ,  Shukuri, Syoji (Central Research Laboratory, Hitachi Ltd.) ,  Sagara, Kazuhiko (Central Research Laboratory, Hitachi Ltd.) ,  Nagai, Ryo (Central Research Laboratory, Hitachi Ltd.) ,  Ohji, Yuzuru (Central Research Laboratory, Hitachi Ltd.) ,  Hasegawa, Norio (Central Research Laboratory, Hitachi Ltd.) ,  Yokoyama, Natsuki (Central Research Laboratory, Hitachi Ltd.) ,  Kure, Tokuo (Central Research Laboratory, Hitachi Ltd.) ,  Nishida, Takashi (Central Research Laboratory, Hitachi Ltd.) ,  Kawajiri, Yoshiki (Semiconductor and Integrated Circuits Division, Hitachi Ltd.) ,  Akiba, Takesada (Hitachi Device Engineering Company Ltd.) ,  Kawase, Yasushi (Hitachi Device Engineering Company Ltd.) ,  Tachibana, Toshikazu (Hitachi Device Engineering Company Ltd.) ,  Sakai, Takeshi (Hitachi Device Engineering Company Ltd.) ,  Kisu, Teruaki (Hitachi VLSI Engineering Corporation) ,  Yamashita, Hisaomi (Hitachi VLSI Engineering Corporation)
Material： IEEE Journal of Solid-State Circuits
Volume： 28  Issue： 11  Page： 1105-1113  Publication year： 1993 
JST Material Number： SCOPUS  ISSN： 0018-9200 
Language： English (EN)

Terms in the title (1)： DRAM