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J-GLOBAL ID：201902216551503404   Reference number：19S0216626

Design of a processing element based on quaternary differential logic for a multi-core SIMD processor

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Author (5)：
Shirahama, Hirokatsu

About Shirahama, Hirokatsu

(Research Institute of Electrical Communication, Tohoku University)

About Research Institute of Electrical Communication, Tohoku University

, 
Mochizuki, Akira

About Mochizuki, Akira

(Research Institute of Electrical Communication, Tohoku University)

About Research Institute of Electrical Communication, Tohoku University

, 
Hanyu, Takahiro

About Hanyu, Takahiro

(Research Institute of Electrical Communication, Tohoku University)

About Research Institute of Electrical Communication, Tohoku University

, 
Nakajima, Masami

About Nakajima, Masami

(Renesas Technology Corporation)

About Renesas Technology Corporation

, 
Arimoto, Kazutami

About Arimoto, Kazutami

(Renesas Technology Corporation)

About Renesas Technology Corporation


Material：
Proceedings of The International Symposium on Multiple-Valued Logic

About Proceedings of The International Symposium on Multiple-Valued Logic


Publication year： 2007 
JST Material Number： SCOPUS  ISSN： 0195-623X  ISBN： 9780769528311  CODEN： PSMLD 
Country of issue： United States (USA)  Language： English (EN)
Terms in the title (2)：
Terms in the title
Keywords automatically extracted from the title.
DESIGN

About DESIGN

, 
SIMD

About SIMD


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