Art

J-GLOBAL ID：201902222728622558   Reference number：19A0995573

Feasibility of plasmonic circuits for on-chip interconnects

オンチップ相互接続のためのプラズモン回路の実現可能性【JST・京大機械翻訳】

Author (5)： Fukuda M. (Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, Toyohashi 441-8580, Japan) ,  Tonooka Y. (Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, Toyohashi 441-8580, Japan) ,  Inoue T. (Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, Toyohashi 441-8580, Japan) ,  Ota M. (Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, Toyohashi 441-8580, Japan) ,  Ota M. (Japan Society for the Promotion of the Science, Chiyoda, Tokyo 102-8472, Japan)
Material： Solid-State Electronics  (Solid-State Electron)
Volume： 156  Page： 33-40  Publication year： 2019 
JST Material Number： H0225A  ISSN： 0038-1101  Document type： Article
Article type： 原著論文  Country of issue： United Kingdom (GBR)  Language： ENGLISH (EN)

Abstract/Point： Feasibility of fabricating pla...

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Thesaurus term： surface plasmon ,  electric signal ,  *interconnection ,  integrated circuit ,  interchangeability ,  WDM ,  transmission speed ,  *plasmon ,  energy loss ,  silicon ,  waveguide ,  complementary metal oxide semiconductor ,  network ,  Si wafer
Semi thesaurus term： *オンチップ , 【Automatic Indexing@JST】

Author keywords (5)： Surface plasmon ,  Plasmonic integrated circuit ,  Waveguide ,  MOSFET ,  Wavelength-division-multiplexing

JST classification (1)： Transistors  (NC03070N)

Terms in the title (4)： オンチップ ,  相互接続 ,  プラズモン ,  実現可能性