Art

J-GLOBAL ID：201902231643626053   Reference number：19A2004370

計算再利用を用いたプロセッサ省電力化の検討

Author (3)： TAKEISHI RYUTARO (名古屋工大) ,  TSUMURA TOMOAKI (名古屋工大) ,  NAKASHIMA YASUHIKO (奈良先端科学技術大学院大)
Material： 情報処理学会研究報告(Web)  (IPSJ Technical Report (Web))
Volume： 2019  Issue： ARC-237  Page： Vol.2019-ARC-237,No.6,1-7 (WEB ONLY)  Publication year： Jul. 17, 2019 
JST Material Number： U0451A  Document type： Proceedings
Article type： 原著論文  Country of issue： Japan (JPN)  Language： JAPANESE (JA)

Thesaurus term： *arithmetic processor ,  fast arithmetic system ,  *reuse ,  consumed electric power ,  evaluation ,  program execution ,  *automated memorization processor ,  Energy efficient technologies ,  saving
Semi thesaurus term： energy saving ,  electric power saving ,  dynamic power

JST classification (2)： Arithmetic systems  (JC02020Z) ,  Special-purpose arithmetic and control units  (JC04030Y)

Reference (7)：

• Tsumura, T., Suzuki, I., Ikeuchi, Y., Matsuo, H., Nakashima, H. and Nakashima, Y.: Design and Evaluation of an Auto-Memoization Processor, Proc. Parallel and Distributed Computing and Networks, pp. 245-250 (2007).
• Norvig, P.: Paradigms of Artificial Intelligence Programming, Morgan Kaufmann (1992).
• Huang, J. and Lilja, D. J.: Exploiting Basic Block Value Locality with Block Reuse, Proc. 5th Int’l Symp. on High-Performance Computer Architecture (HPCA-5), pp. 106-114 (1999).
• Li, S., Ahn, J. H., Strong, R. D., Brockman, J. B., Tullsen, D. M. and Jouppi, N. P.: McPAT: an Integrated Power, Area, and Timing Modeling Framework for Multicore and Manycore Architectures, Microarchitecture, 2009. MICRO-42. 42nd Annual IEEE/ACM International Symposium on, IEEE, pp. 469-480 (2009).
• Li, S., Chen, K., Ahn, J. H., Brockman, J. B. and Jouppi, N. P.: CACTI-P: Architecture-Level Modeling for SRAM-based Structures with Advanced Leakage Reduction Techniques, Computer-Aided Design (ICCAD), 2011 IEEE/ACM International Conference on, IEEE, pp. 694-701 (2011).

Terms in the title (4)： 計算 ,  再利用 ,  プロセッサ ,  省電力化