Research keywords (1)：
Neuromorphic Computing, AI Processor, VLSI, Deep Neural Network, STT-MRAM, Object Detection
Research theme for competitive and other funds (3)：
2021 - 2024 A Novel Power Reduction Technique Using Error-resilient Deep Neural Networks for STT-MRAM Based Energy-efficient Brain-inspired Processor Design
Tao Li, Ko Yoshikawa, Tetsuo Endoh. Hardware-Efficient Activation Circuit for Edge Computing: Shifter-Polynomial Approximation of Leaky ReLU. IEEE Transactions on Circuits and Systems for Artificial Intelligence. 2025. 1-11
Tao Li, Tetsuo Endoh. Memristor State Transition Dynamics for Energy-efficient CiM-driven LLMs in Industrial IoT. IEEE Internet of Things Journal. 2024. 1-11
Li Zhang, Tao Li, Tetsuo Endoh. Small Area and High Throughput Error Correction Module of STT-MRAM for Object Recognition Systems. IEEE Transactions on Industrial Informatics. 2024. 20. 5. 7777-7786
Tao Li, Li Zhang, Yitao Ma, Tetsuo Endoh. Bridging Artificial Intelligence and Devices: Power Reduction Method of Non-volatile Devices with Error-resilient Deep Neural Networks. IEEE Transactions on Magnetics. 2023. 1-9
Tao Li, Yitao Ma, Ko Yoshikawa, Tetsuo Endoh. Erratum: Hybrid Signed Convolution Module With Unsigned Divide-and-Conquer Multiplier for Energy-Efficient STT-MRAM-Based AI Accelerator (IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2023) DOI: 10.1109/TVLSI.2023.3245099). IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2023. 31. 6. 906
Bridging Artificial Intelligence and Non-volatile Devices for Energy-efficient Edge Computing
(The 3th International Conference on Intelligent Computing and Next Generation Networks (ICNGN 2024) 2024)
Integrating Artificial Intelligence into Hardware: Exploring Energy-Efficient Neuromorphic Processors
(Symposium of TSMC A Day in Tohoku University 2023)
A Highly Efficient STT-MRAM-Based IndRNN Accelerator with Approximate Dictionary Encoded Weight for Edge AI Devices
(2023 International Conference on Solid State Devices and Materials 2023)
Bridging Artificial Intelligence and Spintronics: Power Reduction Method of STT-MRAM with Error-resilient Deep Neural Networks
(The 1st Young Scholars Workshop in Spintronics Frontier research from fundamental to application 2023)
Memristor State;Transition Dynamics;Bridging Digital;and Analog Neuromorphic Computing
(FY2023 RIEC Annual Meeting on Cooperative Research Projects 2023)
2024/04 - 現在 Tohoku University Faculty of Engineering Department of Electrical,Information and Physics Engineering Associate Professor
2024/04 - 現在 Tohoku University Center for Innovative Integrated Electronic Systems Associate Professor
2023/04 - 2024/03 Tohoku University Research Institute of Electrical Communication Assistant Professor
2020/06 - 2024/03 Tohoku University Faculty of Engineering Department of Electrical,Information and Physics Engineering Assistant Professor
2020/06 - 2024/03 Tohoku University Center for Innovative Integrated Electronic Systems Assistant Professor
2018/05 - 2020/05 Tohoku University Graduate School of Engineering Researcher
2016/10 - 2018/04 Tokai University Institute of Innovative Science and Technology Researcher
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Committee career (1)：
2024/11 - 現在 International Conference on Computer, Vision and Intelligent Technology Committee Member and Workshop Chair
Awards (2)：
2023/02 - Tohoku University, Tokyo Electron Limited Best Poster Awards -- International Symposium on Design for the Sustainable Society via Digital Technology - Cooperated by Digital Transformation, Semiconductor, and Manufacturing - Power Reduction Method of Non-volatile Devices with Error-resilient Deep Neural Networks
