Art

J-GLOBAL ID：202002215921236990   Reference number：20A0080398

Evaluating Celerity: A 16-nm 695 Giga-RISC-V Instructions/s Manycore Processor With Synthesizable PLL

Celerityの評価:合成可能PLLを用いた16nm 695GIgA-RISC-V命令/S Manycoreプロセッサ【JST・京大機械翻訳】

Author (21)： Rovinski Austin (Electrical Engineering and Computer Science Department, University of Michigan, Ann Arbor, MI, USA) ,  Veluri Bandhav (School of Computer Science & Engineering, University of Washington, Seattle, WA, USA) ,  Rao Anuj (Electrical and Computer Engineering Department, University of California at San Diego, La Jolla, CA, USA) ,  Ajayi Tutu (Electrical Engineering and Computer Science Department, University of Michigan, Ann Arbor, MI, USA) ,  Puscar Julian (Electrical and Computer Engineering Department, University of California at San Diego, La Jolla, CA, USA) ,  Dai Steve (School of Electrical and Computer Engineering, Cornell University, Ithaca, NY, USA) ,  Zhao Ritchie (School of Electrical and Computer Engineering, Cornell University, Ithaca, NY, USA) ,  Richmond Dustin (School of Computer Science & Engineering, University of Washington, Seattle, WA, USA) ,  Zhang Zhiru (School of Electrical and Computer Engineering, Cornell University, Ithaca, NY, USA) ,  Galton Ian (Electrical and Computer Engineering Department, University of California at San Diego, La Jolla, CA, USA) ,  Batten Christopher (School of Electrical and Computer Engineering, Cornell University, Ithaca, NY, USA) ,  Zhao Chun (School of Computer Science & Engineering, University of Washington, Seattle, WA, USA) ,  Taylor Michael B. (School of Computer Science & Engineering, University of Washington, Seattle, WA, USA) ,  Dreslinski Ronald G. (Electrical Engineering and Computer Science Department, University of Michigan, Ann Arbor, MI, USA) ,  Al-Hawaj Khalid (School of Electrical and Computer Engineering, Cornell University, Ithaca, NY, USA) ,  Gao Paul (School of Computer Science & Engineering, University of Washington, Seattle, WA, USA) ,  Xie Shaolin (School of Computer Science & Engineering, University of Washington, Seattle, WA, USA) ,  Torng Christopher (School of Electrical and Computer Engineering, Cornell University, Ithaca, NY, USA) ,  Davidson Scott (School of Computer Science & Engineering, University of Washington, Seattle, WA, USA) ,  Amarnath Aporva (Electrical Engineering and Computer Science Department, University of Michigan, Ann Arbor, MI, USA) ,  Vega Luis (School of Computer Science & Engineering, University of Washington, Seattle, WA, USA)
Material： IEEE Solid-State Circuits Letters
Volume： 2  Issue： 12  Page： 289-292  Publication year： 2019 
JST Material Number： W3688A  ISSN： 2573-9603  CODEN： ISCLCN  Document type： Article
Article type： 原著論文  Country of issue： United States (USA)  Language： ENGLISH (EN)

Abstract/Point： This letter presents a 16-nm 4...

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Thesaurus term： *RISC machine ,  benchmark ,  bandwidth ,  throughput ,  aggregate ,  computer architecture ,  energy efficiency ,  *arithmetic processor
Semi thesaurus term： 高密度 ,  ネットワークオンチップ , 【Automatic Indexing@JST】

JST classification (3)： Semiconductor integrated circuit  (NC03162T) ,  Special-purpose arithmetic and control units  (JC04030Y) ,  Computer networks  (JC03000K)

Terms in the title (5)： 評価 ,  PLL ,  RISC ,  命令 ,  プロセッサ