Art
J-GLOBAL ID:202002265587803377   Reference number:20A0270200

Evaluation on Configurable Approximate Circuit for Aging-Induced Timing Violation Tolerance

加齢により誘発されたタイミング違反耐性のための構成可能な近似回路に関する評価【JST・京大機械翻訳】
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Material:
Volume: 2019  Issue: PRDC  Page: 23-231  Publication year: 2019 
JST Material Number: W2441A  Document type: Proceedings
Article type: 原著論文  Country of issue: United States (USA)  Language: ENGLISH (EN)
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This paper presents simulation...
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JST classification (2):
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Graphic and image processing in general  ,  General 
Terms in the title (5):
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