Art
J-GLOBAL ID:202102217128052123   Reference number:21A0339774

Efficient hardware task migration for heterogeneous FPGA computing using HDL-based checkpointing

HDLベースチェックポイントを用いた異種FPGA計算のための効率的なハードウェアタスクマイグレーション【JST・京大機械翻訳】
Author (3):
Material:
Volume: 77  Page: 180-192  Publication year: 2021 
JST Material Number: H0891A  ISSN: 0167-9260  Document type: Article
Article type: 原著論文  Country of issue: Netherlands (NLD)  Language: ENGLISH (EN)
Abstract/Point:
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Task migration plays an import...
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JST classification
Category name(code) classified by JST.
Special-purpose arithmetic and control units  ,  General  ,  Code theory  ,  Semiconductor integrated circuit 

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