Art

J-GLOBAL ID：202102235991763917   Reference number：21A0132149

FF-Control Point Insertion (FF-CPI) to Overcome the Degradation of Fault Detection under Multi-Cycle Test for POST

POSTのマルチサイクルテストにおける故障検出の劣化を克服するためのFF制御点挿入(FF-CPI)

Author (8)： Al-AWADHI Hanan T. (Dept. of Computer Science, Ehime University) ,  AONO Tomoki (Dept. of Computer Science, Ehime University) ,  WANG Senling (Dept. of Computer Science, Ehime University) ,  HIGAMI Yoshinobu (Dept. of Computer Science, Ehime University) ,  TAKAHASHI Hiroshi (Dept. of Computer Science, Ehime University) ,  IWATA Hiroyuki (Renesas Electronics Corporation) ,  MAEDA Yoichi (Renesas Electronics Corporation) ,  MATSUSHIMA Jun (Renesas Electronics Corporation)
Material： IEICE Transactions on Information and Systems (Web)  (IEICE Trans Inf Syst (Web))
Volume： E103.D  Issue： 11  Page： 2289-2301(J-STAGE)  Publication year： 2020 
JST Material Number： U0469A  ISSN： 1745-1361  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： *test ,  *fault detection ,  stuck-fault ,  degradation(alteration) ,  coverage factor ,  *point ,  bistable circuit ,  benchmark ,  effectiveness ,  diagnostic program ,  built-in self-test ,  automobile ,  international standard
Semi thesaurus term： ISO26262 ,  self-test ,  *test ,  flip-flop circuit ,  fault coverage ,  *control point

Author keywords (6)： POST ,  BIST ,  Multi-Cycle Test ,  Fault detection degradation ,  FF-Control Point Insertion technique ,  FF selection

JST classification (2)： Electric equipment  (QG03070C) ,  Measurement,testing and reliability of solid-state devices  (NC03040G)

Reference (20)：

• [1] ISO26262-5:2011, “Road vehicles-Functional Safety-Part 5: Product development at the hardware level,” Online Browsing Platform, https://www.iso.org/obp/ui/#iso:std:iso:26262:-5:ed-1:v1:en, accessed Nov. 10. 2018.
• [2] H. Iwata and J. Matsushima, “Multi-configuration Scan Structure for Various Purposes,” Proc. IEEE 25th Asian Test Symposium,Hiroshima, p.131, Nov. 2016. DOI: 10.1109/ATS.2016.32 10.1109/ats.2016.32
• [3] N.A. Touba, “Survey of Test Vector Compaction Techniques,” IEEE Des. Test. Comput., vol.23, no.4, pp.294-303, April 2006. DOI: 10.1109/MDT.2006.105 10.1109/mdt.2006.105
• [4] F. Zhang, D. Hwong, Y. Sun, A. Garcia, S. Alhelaly, G. Shofner, L. Winemberg, and J. Dworak, “Putting wasted clock cycles to use: Enhancing fortuitous cell-aware fault detection with scan shift capture,” Proc. IEEE Int'l Test Conf., Fort Worth, pp.1-10, 2016. DOI: 10.1109/TEST.2016.7805828 10.1109/test.2016.7805828
• [5] G. Mrugalski, J. Rajski, J. Solecki, J. Tyszer, and C. Wang, “Trimodal Scan-Based Test Paradigm,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol.25, no.3, pp.1112-1125, March 2017. DOI: 10.1109/TVLSI.2016.2608984 10.1109/tvlsi.2016.2608984

Terms in the title (2)： 故障検出 ,  制御点