Koki Shinraku, Katsuhisa Yamanaka, Takashi Hirayama. Efficient enumeration of transversal edge-partitions. Discrete Applied Mathematics. 2025. 361. 276-287
Takashi HIRAYAMA, Rin SUZUKI, Katsuhisa YAMANAKA, Yasuaki NISHITANI. New Bounds for Quick Computation of the Lower Bound on the Gate Count of Toffoli-Based Reversible Logic Circuits. IEICE Transactions on Information and Systems. 2024. E107.D. 8. 940-948
Yusuke Sano, Katsuhisa Yamanaka, Takashi Hirayama. A polynomial delay algorithm for enumerating 2-edge-connected induced subgraphs. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 2020. 12340. 13-24