Rchr
J-GLOBAL ID:201701015906809824   Update date: Feb. 01, 2024

MUTHUMALA WAIDYASOORIYA HASITHA

ウイツデヤスーリヤ ムトウマラ ハシタ | MUTHUMALA WAIDYASOORIYA HASITHA
Affiliation and department:
Job title: Researcher
Homepage URL  (2): http://db.tohoku.ac.jp/whois/detail/adfad93fd70767c279e9231a06c0dbad.htmlhttp://db.tohoku.ac.jp/whois/e_detail/adfad93fd70767c279e9231a06c0dbad.html
Research field  (1): Computer systems
Research theme for competitive and other funds  (2):
  • 2012 - 2016 Development of Heterogeneous-Computing Platform with Custom Accelerators for Embedded HPC Applications
  • 2011 - 2013 カスタムアクセラレータを有する高性能計算ヘテロジニアスプラットフォーム
Papers (50):
  • Mitsuhiro Okada, Takayuki Suzuki, Naoya Nishio, Hasitha Muthumala Waidyasooriya, Masanori Hariyama. FPGA-Accelerated Searchable Encrypted Database Management Systems for Cloud Services. IEEE Transactions on Cloud Computing. 2022. 10. 2. 1373-1385
  • Hasitha Muthumala Waidyasooriya, Masanori Hariyama. Temporal and spatial parallel processing of simulated quantum annealing on a multicore CPU. The Journal of Supercomputing. 2022. 78. 6. 8733-8750
  • Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Hiroe Iwasaki, Daisuke Kobayashi, Yuya Omori, Ken Nakamura, Koyo Nitta, Kimikazu Sano. OpenCL-Based Design of an FPGA Accelerator for H.266/VVC Transform and Quantization. 2022 IEEE 65TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS 2022). 2022
  • Hasitha Muthumala Waidyasooriya, Hiroki Oshiyama, Yuya Kurebayashi, Masanori Hariyama, Masayuki Ohzeki. A Scalable Emulator for Quantum Fourier Transform Using Multiple-FPGAs With High-Bandwidth-Memory. IEEE Access. 2022. 1-1
  • Chia-Yin Liu, Hasitha Muthumala Waidyasooriya, Masanori Hariyama. Design space exploration for an FPGA-based quantum annealing simulator with interaction-coefficient-generators. The Journal of Supercomputing. 2022
more...
MISC (15):
  • Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Kunio Uchiyama. Design of FPGA-based computing systems with openCL. Design of FPGA-Based Computing Systems with OpenCL. 2017. 1-126
  • Hasitha Muthumala Waidyasooriya, Daisuke Ono, Masanori Hariyama, Michitaka Kameyama. An FPGA Architecture for Text Search Using a Wavelet-Tree-Based Succinct-Data-Structure. International Conference on Parallel and Distributed Processing Techniques and Applications. 2015. 354-359
  • Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama. FPGA-Oriented Design of an FDTD Accelerator Based on Overlapped Tiling. International Conference on Parallel and Distributed Processing Techniques and Applications. 2015. 72-77
  • WAIDYASOORIYA Hasitha Muthumala, HARIYAMA Masanori, KAMEYAMA Michitaka. Highly-Parallel FPGA Accelerator for DNA Sequence Alignment Using the Burrows-Wheeler Algorithm. IEICE technical report. 2014. 114. 75. 17-20
  • Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama. FPGA-Accelerator for DNA Sequence Alignment Based on an Efficient Data-Dependent Memory Access Scheme. Proceedings of the 5th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies. 2014. 127-130
more...
※ Researcher’s information displayed in J-GLOBAL is based on the information registered in researchmap. For details, see here.

Return to Previous Page