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J-GLOBAL ID：201701015906809824   Update date: Nov. 06, 2024

MUTHUMALA WAIDYASOORIYA HASITHA

ウイツデヤスーリヤ ムトウマラ ハシタ | MUTHUMALA WAIDYASOORIYA HASITHA
Affiliation and department：
Tohoku University Graduate School of Information Sciences Department of Computer and Mathematical Sciences Computation Science and Systems Intelligent Integrated Systems

About Tohoku University Graduate School of Information Sciences Department of Computer and Mathematical Sciences Computation Science and Systems Intelligent Integrated Systems


Job title： Researcher
Homepage URL  (2)： http://db.tohoku.ac.jp/whois/detail/adfad93fd70767c279e9231a06c0dbad.html ,  http://db.tohoku.ac.jp/whois/e_detail/adfad93fd70767c279e9231a06c0dbad.html
Research field  (1)： Computer systems
Research theme for competitive and other funds  (6)：
  • 2024 - 2028 High-efficiency Heterogeneous Custom Accelerator Foundation for Transformer
  • 2020 - 2024 Custom Accelerators for Quantum-Annealing-Assisted Material Informatics
  • 2019 - 2023 High Speed FPGA Simulator for Large Scale Quantum Annealing Simulations
  • 2015 - 2017 Developing a Smart Storage based on a Succinct Data Structure that Processes Compressed Data
  • 2012 - 2016 Development of Heterogeneous-Computing Platform with Custom Accelerators for Embedded HPC Applications
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Papers (56)：
  • Waidyasooriya, H.M., Hariyama, M. Performance evaluation of Word2vec accelerators exploiting spatial and temporal parallelism on DDR/HBM-based FPGAs. Journal of Supercomputing. 2024. 80. 12
  • Okada, M., Suzuki, T., Nishio, N., Waidyasooriya, H.M., Hariyama, M. FPGA-Accelerated Searchable Encrypted Database Management Systems for Cloud Services. IEEE Transactions on Cloud Computing. 2022. 10. 2. 1373-1385
  • Waidyasooriya, H.M., Hariyama, M. Temporal and spatial parallel processing of simulated quantum annealing on a multicore CPU. Journal of Supercomputing. 2022. 78. 6. 8733-8750
  • Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Hiroe Iwasaki, Daisuke Kobayashi, Yuya Omori, Ken Nakamura, Koyo Nitta, Kimikazu Sano. OpenCL-Based Design of an FPGA Accelerator for H.266/VVC Transform and Quantization. 2022 IEEE 65TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS 2022). 2022
  • Waidyasooriya, H.M., Oshiyama, H., Kurebayashi, Y., Hariyama, M., Ohzeki, M. A Scalable Emulator for Quantum Fourier Transform Using Multiple-FPGAs With High-Bandwidth-Memory. IEEE Access. 2022. 10. 1-1
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MISC (15)：
  • Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Kunio Uchiyama. Design of FPGA-based computing systems with openCL. Design of FPGA-Based Computing Systems with OpenCL. 2017. 1-126
  • Hasitha Muthumala Waidyasooriya, Daisuke Ono, Masanori Hariyama, Michitaka Kameyama. An FPGA Architecture for Text Search Using a Wavelet-Tree-Based Succinct-Data-Structure. International Conference on Parallel and Distributed Processing Techniques and Applications. 2015. 354-359
  • Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama. FPGA-Oriented Design of an FDTD Accelerator Based on Overlapped Tiling. International Conference on Parallel and Distributed Processing Techniques and Applications. 2015. 72-77
  • WAIDYASOORIYA Hasitha Muthumala, HARIYAMA Masanori, KAMEYAMA Michitaka. Highly-Parallel FPGA Accelerator for DNA Sequence Alignment Using the Burrows-Wheeler Algorithm. IEICE technical report. 2014. 114. 75. 17-20
  • Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama. FPGA-Accelerator for DNA Sequence Alignment Based on an Efficient Data-Dependent Memory Access Scheme. Proceedings of the 5th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies. 2014. 127-130
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Patents (3)：
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