Art
J-GLOBAL ID：200902026480798377   Reference number：92A0679789

An Integrated Approach to Realistic Worst-Case Design Optimization of MOS Analog Circuits.

MOSアナログ回路の現実の最悪事態の設計最適化に対する集積化アプローチ
Author (2)：
DHARCHOUDHURY A

About DHARCHOUDHURY A

(Univ. Illinois at Urbana-Champaign, IL)

About Univ. Illinois at Urbana-Champaign, IL

, 
KANG S M

About KANG S M

(Univ. Illinois at Urbana-Champaign, IL)

About Univ. Illinois at Urbana-Champaign, IL


Material：
Proceedings of the Design Automation Conference  (Proc Des Autom Conf)

About Proceedings of the Design Automation Conference


Volume： 29th  Page： 704-709  Publication year： 1992 
JST Material Number： D0553A  ISSN： 0738-100X  Document type： Proceedings
Article type： 原著論文  Country of issue： United States (USA)  Language： ENGLISH (EN)
Thesaurus term：
Thesaurus term/Semi thesaurus term
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MOS integrated circuit

About MOS integrated circuit

,...
Semi thesaurus term：
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
最悪時設計

About 最悪時設計


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JST classification (2)：
JST classification
Category name(code) classified by JST.
General 
(NC03161C)

About General

,  Amplification circuits 
(NC05040U)

About Amplification circuits

Terms in the title (5)：
Terms in the title
Keywords automatically extracted from the title.
MOS

About MOS

, 
アナログ回路

About アナログ回路

, 
現実

About 現実

, 
設計最適化

About 設計最適化

, 
集積化

About 集積化


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