Art

J-GLOBAL ID：200902101075625513   Reference number：96A0353813

Capacitance-Voltage Characteristics of Buried-Channel MOS Capacitors with a Structure of Subquarter-Micron pMOS.

サブクォータミクロンpMOSの構造をもつ埋込みチャネルMOSキャパシタの容量電圧特性

Author (2)： MIYAKE M (Nippon Telegraph and Telephone Corp., Atsugi-shi, JPN) ,  OKAZAKI Y (Nippon Telegraph and Telephone Corp., Atsugi-shi, JPN)
Material： IEICE Transactions on Electronics (Institute of Electronics, Information and Communication Engineers)  (IEICE Trans Electron (Inst Electron Inf Commun Eng))
Volume： E79-C  Issue： 3  Page： 430-436  Publication year： Mar. 1996 
JST Material Number： L1370A  ISSN： 0916-8524  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： MOSFET ,...
Semi thesaurus term： MOS capacitor

   To see more with JDream III (charged).   {{ this.onShowAbsJLink("http://jdream3.com/lp/jglobal/index.html?docNo=96A0353813&from=J-GLOBAL&jstjournalNo=L1370A") }}

JST classification (1)： Transistors  (NC03070N)

Reference (16)：

• CHAM, K. M. Device design for the submicrometer p-channel FET with n^+ polysilicon gate. IEEE Trans. Electron Devices. 1984, ED-31, 964
• SCHMITZ, A. E. Design, modeling and fabrication of subhalf-micrometer CMOS transistors. IEEE Trans. Electron Devices. 1986, ED-33, 148
• MIYAKE, M. Subquartermicrometer get-length p-channel and n-channel MOSFETs with extremely shallow source-drain junctions. IEEE Trans. Electron Devices. 1989, 36, 392
• OKAZAKI, Y. High-performance subquarter-micrometer gate CMOS technology. IEEE Electron Device Lett. 1990, 11, 134
• MIYAKE, M. Sub-quarter-micrometer gate-length p-channel MOSFETs with shallow boron counter-doped layer fabricated using channel preamorphization. IEEE Trans. Electron Devices. 1990, 37, 2007

Terms in the title (5)： PMOS ,  埋込み ,  チャネル ,  MOSキャパシタ ,  容量電圧特性