Art
J-GLOBAL ID：200902167156613758   Reference number：97A0655849

Reliability design of current stress in LSI interconnects using the estimation of failure rate due to electromigration.

エレクトロマイグレーションによる故障率推定を用いたLSI配線における電流ストレスの信頼性設計
Author (2)：
HIRAOKA K

About HIRAOKA K

(NTT LSI Lab., Kanagawa pref., JPN)

About NTT LSI Lab., Kanagawa pref., JPN

, 
NIKAIDO T

About NIKAIDO T

(NTT LSI Lab., Kanagawa pref., JPN)

About NTT LSI Lab., Kanagawa pref., JPN


Material：
Microelectronics Reliability  (Microelectronics and Reliability)

About Microelectronics Reliability


Volume： 37  Issue： 8  Page： 1185-1191  Publication year： Aug. 1997 
JST Material Number： C0530A  ISSN： 0026-2714  Document type： Article
Article type： 原著論文  Country of issue： United Kingdom (GBR)  Language： ENGLISH (EN)
Thesaurus term：
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Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
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electromigration

About electromigration

,...
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JST classification (1)：
JST classification
Category name(code) classified by JST.
Measurement,testing and reliability of solid-state devices 
(NC03040G)

About Measurement,testing and reliability of solid-state devices

Terms in the title (6)：
Terms in the title
Keywords automatically extracted from the title.
エレクトロマイグレーション

About エレクトロマイグレーション

, 
故障率

About 故障率

, 
推定

About 推定

, 
LSI

About LSI

, 
電流ストレス

About 電流ストレス

, 
信頼性設計

About 信頼性設計


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