Art
J-GLOBAL ID：200902173771023197
Reference number：99A0924146
Dilation and Reduction Processing in Finite Topological Spaces and Its Application to Inspection of Printed Circuit Boards.
有限位相空間における膨張・収縮処理とプリント配線パターン検査への応用
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Author (5)：
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Material：
Volume：
J82-A
Issue：
9
Page：
1454-1464
Publication year：
Sep. 25, 1999
JST Material Number：
S0621A
ISSN：
0913-5707
Document type：
Article
Article type：
原著論文
Country of issue：
Japan (JPN)
Language：
JAPANESE (JA)
Thesaurus term：
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
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JST classification (2)：
JST classification
Category name(code) classified by JST.
Graphic and image processing in general
, Printed circuits
Terms in the title (5)：
Terms in the title
Keywords automatically extracted from the title.
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