Art
J-GLOBAL ID：200902267702024984   Reference number：05A0318456

Memory Allocation and Code Optimization Methods for DSPs with Indexed Auto-Modification

指標付き自己修正によるDSPに対するメモリ割当てとコード最適化
Author (3)：
KANEKO Yuhei

About KANEKO Yuhei

(Tokyo Inst. of Technol., Yokohama-shi, JPN)

About Tokyo Inst. of Technol., Yokohama-shi, JPN

, 
SUGINO Nobuhiko

About SUGINO Nobuhiko

(Tokyo Inst. of Technol., Yokohama-shi, JPN)

About Tokyo Inst. of Technol., Yokohama-shi, JPN

, 
NISHIHARA Akinori

About NISHIHARA Akinori

(Tokyo Inst. of Technol., Yokohama-shi, JPN)

About Tokyo Inst. of Technol., Yokohama-shi, JPN


Material：
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences (Institute of Electronics, Information and Communication Engineers)  (IEICE Trans Fundam Electron Commun Comput Sci (Inst Electron Inf Commun Eng))

About IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences (Institute of Electronics, Information and Communication Engineers)


Volume： E88-A  Issue： 4  Page： 846-854  Publication year： Apr. 01, 2005 
JST Material Number： F0699C  ISSN： 0916-8508  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)
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*compiler

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,...
Semi thesaurus term：
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
*DSP

About DSP

,...
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JST classification (1)：
JST classification
Category name(code) classified by JST.
Language processors 
(JD03040F)

About Language processors

Reference (7)：
  • KANEKO, Y. Memory allocation method for indirect addressing with an index register. 2002 IEEE Asia Pacific Conference on Circuit and Systems, Singapore, Dec. 2002, 199-202
  • MIYAHARA, K. DSP code optimization technique with consideration in both computational ordering and memory access. IEICE, Digital Signal Processing Symposium in Japan, 21, May 2002. 2002
  • SENO, R. Memory allocation method for indirect addressing with index register. 14th Digital Signal Processing Symposium in Japan, Nov. 1999. 1999, 617-622
  • WESS, B. DSP data memory layouts optimized for intermidiate address pointer updates. Proc. IEEE APCCAS 1998. 1998, 451-454
  • SUGINO, N. Code optimization method for DSPs with multiple memory addressing registers and its application to compiler. IEEE TENCON 1996. 1996, 619-624
ｍore...
Terms in the title (5)：
Terms in the title
Keywords automatically extracted from the title.
指標

About 指標

, 
自己

About 自己

, 
DSP

About DSP

, 
メモリ割当て

About メモリ割当て

, 
コード最適化

About コード最適化


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