Art
J-GLOBAL ID:200902275855222575   Reference number:05A0681652

Modeling and Simulation of Via-Connected Power Bus Stacks in Multilayer PCBs

多層PCBにおけるビア接続電力バススタックのモデル化とシミュレーション
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Material:
Volume: E88-B  Issue:Page: 3176-3181  Publication year: Aug. 01, 2005 
JST Material Number: L1369A  ISSN: 0916-8516  Document type: Article
Article type: 原著論文  Country of issue: Japan (JPN)  Language: ENGLISH (EN)
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Noise measurement  ,  Printed circuits 
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