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J-GLOBAL ID:201502206966252356   Reference number:15A1380603

Time-to-Digital Converter-Based Maximum Delay Sensor for On-Line Timing Error Detection in Logic Block of Very Large Scale Integration Circuits

超大規模集積回路の論理ブロックのオンラインタイミング誤差検出のための時間-ディジタル変換器ベース最大遅延センサ
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Material:
Volume: 27  Issue: 10  Page: 933-943  Publication year: 2015 
JST Material Number: L0338A  ISSN: 0914-4935  CODEN: SENMER  Document type: Article
Article type: 原著論文  Country of issue: Japan (JPN)  Language: ENGLISH (EN)
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All keywords is available on JDreamIII(charged).
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Category name(code) classified by JST.
Semiconductor integrated circuit 
Reference (16):
  • IBM Corp.: Homepage of IBM Corp., http://www.ibm.com/ibm/green/?lnk=msoST-eaen. (accessed January 2015).
  • IBM Corp.: Homepage of IBM Corp., http://www-03.ibm.com/press/us/en/pressrelease/44357.wss (accessed January 2015).
  • I. D. Ernst, N. S. Kim, S. Das, S. Pant, R. Rao, T. Pham, C. Ziesler, D. Blaauw, T. Austin, K. Flautner and T. Mudge: Proc. IEEE/ACM International Symposium on Microarchitecture (IEEE, New York, 2003) pp. 7-18.
  • J. Wong and P. Y. Cheung: IEEE Trans. VLSI Syst. 21 (2013) 2307.
  • R. M. Agarwal, V. Balakrishnan, A. Bhuyan, K. Kim, B. C. Paul, W. Wang, B. Yang, Y. Cao and S. Mitra: Proc. IEEE International Test Conference (IEEE, New York, 2008) pp. 1-10.
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