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J-GLOBAL ID:201602262623298383   Reference number:16A1305779

On the Three-Dimensional Channel Routing

3次元チャネル経路選定について
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Volume: E99.A  Issue: 10  Page: 1813-1821(J-STAGE)  Publication year: 2016 
JST Material Number: U0466A  ISSN: 1745-1337  Document type: Article
Article type: 原著論文  Country of issue: Japan (JPN)  Language: ENGLISH (EN)
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Reference (22):
  • [1] N. Alon, “A simple algorithm for edge-coloring bipartite multigraphs,” Inform. Process. Lett., vol.85, no.6, pp.301-302, 2003.
  • [2] J. Baliga, “Chips Go Vertical,” IEEE Spectr., vol.41, no.3, pp.43-47, 2004.
  • [3] K. Banerjee, S.J. Souri, P. Kapur, and K.C. Saraswat, “3-D ICs: A novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration,” Proc. IEEE, vol.89, no.5, pp.602-633, 2001.
  • [4] M.L. Brady, D.J. Brown, and P.J. McGUINESS, “The three-dimensional channel routing problem,” Algorithmic Aspects of VLSI Layout, Lecture Notes Series on Computing, vol.2, pp.213-244, World Scientific, 1993.
  • [5] R. Cole and J. Hopcroft, “On edge coloring bipartite graphs,” SIAM J. Comput., vol.11, no.3, pp.540-546, 1982.
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