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J-GLOBAL ID：201702239715663837   Reference number：17A0274326

DLAU: A Scalable Deep Learning Accelerator Unit on FPGA

DLAU:FPGA上でのスケーラブルな深層学習加速器ユニット【Powered by NICT】

Author (6)： Wang Chao (University of Science and Technology of China, Hefei, China) ,  Gong Lei (University of Science and Technology of China, Hefei, China) ,  Yu Qi (University of Science and Technology of China, Hefei, China) ,  Li Xi (University of Science and Technology of China, Hefei, China) ,  Xie Yuan (University of California at Santa Barbara, Santa Barbara, CA, USA) ,  Zhou Xuehai (University of Science and Technology of China, Hefei, China)
Material： IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (IEEE Trans Comput-Aided Des Integr Circuits Syst)
Volume： 36  Issue： 3  Page： 513-517  Publication year： 2017 
JST Material Number： B0142C  ISSN： 0278-0070  CODEN： ITCSDI  Document type： Article
Article type： 原著論文  Country of issue： United States (USA)  Language： ENGLISH (EN)

Abstract/Point： As the emerging field of machi...

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Thesaurus term： deep ,  *accelerator ,  arithmetic processor ,  network ,  pipeline processing ,  electric power consumption ,  neural network(biomodel) ,  throughput ,  machine learning ,  *FPGA ,  locality ,  *learning
Semi thesaurus term： 低電力化 ,  *深層学習 , 【Automatic Indexing@JST】

JST classification (2)： Semiconductor integrated circuit  (NC03162T) ,  CAD,CAM  (JE10000A)

Terms in the title (3)： FPGA ,  深層学習 ,  加速器