Art
J-GLOBAL ID:201802242229828136
Reference number:18A0591030
メモリアクセスパターン依存故障の注入のためのQEMUベース故障注入器
Author (6):
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Material:
Volume:
2018
Issue:
HPC-163
Page:
Vol.2018-HPC-163,No.8,1-10 (WEB ONLY)
Publication year:
Feb. 21, 2018
JST Material Number:
U0451A
Document type:
Proceedings
Article type:
原著論文
Country of issue:
Japan (JPN)
Language:
JAPANESE (JA)
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Semi thesaurus term:
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
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JST classification (2):
JST classification
Category name(code) classified by JST.
Memory units
, Memory systems
Reference (17):
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Fatimah Adamu-Fika and Arshad Jhumka. An investigation of the impact of double bit-flip error variants on program execution. In International Conference on Algorithms and Architectures for Parallel Processing, pages 799-813. Springer, 2015.
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Jean Arlat, Yves Crouzet, and J-C Laprie. Fault injection for dependability validation of fault-tolerant computing systems. In Fault-Tolerant Computing, 1989. FTCS-19. Digest of Papers., Nineteenth International Symposium on, pages 348-355. IEEE, 1989.
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David H Bailey, Eric Barszcz, John T Barton, David S Browning, Robert L Carter, Leonardo Dagum, Rod A Fatoohi, Paul O Frederickson, Thomas A Lasinski, Rob S Schreiber, et al. The nas parallel benchmarks. The International Journal of Supercomputing Applications, 5(3):63-73, 1991.
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Michael Bushnell and Vishwani Agrawal. Essentials of electronic testing for digital, memory and mixed-signal VLSI circuits, volume 17. Springer Science & Business Media, 2004.
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Franck Cappello, Al Geist, William Gropp, Sanjay Kale, Bill Kramer, and Marc Snir. Toward exascale resilience: 2014 update. Supercomputing frontiers and innovations, 1(1):5-28, 2014.
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